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authorImre Deak <imre.deak@intel.com>2017-07-06 17:40:32 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2017-07-27 10:38:52 +0300
commit00742cabcc7a4f6bae03cef538c9bb020875115a (patch)
treed4b7f459c9706e8a88dcec7e364fc409c8ee201c /drivers/gpu/drm/i915/i915_reg.h
parent9137726abc3bc3217dd3adde67c1dce9a1a87c3f (diff)
downloadlinux-00742cabcc7a4f6bae03cef538c9bb020875115a.tar.xz
drm/i915/hsw, bdw: Remove redundant state check during power well toggling
Similarly to the GEN9 power well toggling, saving an occasional extra MMIO write is not worth the code complexity, let's simplify things. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1499352040-8819-11-git-send-email-imre.deak@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
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