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authorDaniel Vetter <daniel.vetter@ffwll.ch>2010-11-06 12:10:47 +0300
committerChris Wilson <chris@chris-wilson.co.uk>2010-11-23 23:14:47 +0300
commit7c2e6fdf452cddeff6a8ee5156edba39e53246fc (patch)
tree47d05b26b8cda6da59bf0b6ce8f4ca0529a7c791 /drivers/gpu/drm/i915/i915_gem_gtt.c
parentcb16b67b5cb33b7d6732e0c416d29d933eea13ce (diff)
downloadlinux-7c2e6fdf452cddeff6a8ee5156edba39e53246fc.tar.xz
drm/i915: move gtt handling to i915_gem_gtt.c
No more drm_*_agp in i915_gem.c! Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_gtt.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gem_gtt.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5f21d0a962c4..f78c15f9e7f2 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -47,3 +47,31 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
/* Be paranoid and flush the chipset cache. */
intel_gtt_chipset_flush();
}
+
+int i915_gem_gtt_bind_object(struct drm_gem_object *obj)
+{
+ struct drm_device *dev = obj->dev;
+ struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
+
+ /* Create an AGP memory structure pointing at our pages, and bind it
+ * into the GTT.
+ */
+ obj_priv->agp_mem = drm_agp_bind_pages(dev,
+ obj_priv->pages,
+ obj->size >> PAGE_SHIFT,
+ obj_priv->gtt_space->start,
+ obj_priv->agp_type);
+
+ if (obj_priv->agp_mem)
+ return 0;
+ else
+ return -ENOMEM;
+}
+
+void i915_gem_gtt_unbind_object(struct drm_gem_object *obj)
+{
+ struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
+
+ drm_unbind_agp(obj_priv->agp_mem);
+ drm_free_agp(obj_priv->agp_mem, obj->size / PAGE_SIZE);
+}