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authorChris Wilson <chris@chris-wilson.co.uk>2017-02-08 17:30:32 +0300
committerChris Wilson <chris@chris-wilson.co.uk>2017-02-08 19:24:42 +0300
commitd80270931314a88d79d9bd5e0a5df93c12196375 (patch)
treedf7a4f979558c046c15b35527fc1f937f15eb43b /drivers/gpu/drm/i915/i915_drv.c
parent20a8a74ad9473e498da47e3094fa73057f3246d1 (diff)
downloadlinux-d80270931314a88d79d9bd5e0a5df93c12196375.tar.xz
drm/i915: Split GEM resetting into 3 phases
Currently we do a reset prepare/finish around the call to reset the GPU, but it looks like we need a later stage after the hw has been reinitialised to allow GEM to restart itself. Start by splitting the 2 GEM phases into 3: prepare - before the reset, check if GEM recovered, then stop GEM reset - after the reset, update GEM bookkeeping finish - after the re-initialisation following the reset, restart GEM Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170208143033.11651-2-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.c')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 78191e00a00c..d48c02a7933f 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1836,7 +1836,7 @@ void i915_reset(struct drm_i915_private *dev_priv)
goto error;
}
- i915_gem_reset_finish(dev_priv);
+ i915_gem_reset(dev_priv);
intel_overlay_reset(dev_priv);
/* Ok, now get things going again... */
@@ -1859,6 +1859,7 @@ void i915_reset(struct drm_i915_private *dev_priv)
goto error;
}
+ i915_gem_reset_finish(dev_priv);
i915_queue_hangcheck(dev_priv);
wakeup: