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| author | Sagar Arun Kamble <sagar.a.kamble@intel.com> | 2017-10-11 00:30:01 +0300 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2017-10-11 10:56:52 +0300 |
| commit | 3a85392c0ea0689d8d3ba1f9c9df5d3e32bfa517 (patch) | |
| tree | ba2f1a7ffee28c0503d1be1f96866847a43d7e8e /drivers/gpu/drm/i915/i915_debugfs.c | |
| parent | 415544d5a89fb2be3b12dc7c4682806323aabdbf (diff) | |
| download | linux-3a85392c0ea0689d8d3ba1f9c9df5d3e32bfa517.tar.xz | |
drm/i915: Separate RPS and RC6 handling for BDW
This patch separates RC6 and RPS enabling for BDW.
RC6/RPS Disabling are handled through gen6 functions.
PM Programming guide recommends a sequence within forcewakes to
configure RC6, RPS and ring frequencies in sequence. With this
patch the order is still maintained.
v2: Update sequence numbers in RC6 programming and comment about
intent of reset_rps during gen8_enable_rps. (Radoslaw)
v3: Rebase.
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/1507360055-19948-4-git-send-email-sagar.a.kamble@intel.com
Acked-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20171010213010.7415-3-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_debugfs.c')
0 files changed, 0 insertions, 0 deletions