diff options
| author | Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> | 2019-07-23 12:14:04 +0300 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-07-23 13:38:23 +0300 |
| commit | de6a263400f232a3787bdb112d9c974ebd29c4b4 (patch) | |
| tree | 20075c4b506d0085da4f65abf2d7d07a3a31cc64 /drivers/gpu/drm/i915/gem/i915_gem_pm.c | |
| parent | 3fcba88188a85a398c2c9245d148c952e2d53889 (diff) | |
| download | linux-de6a263400f232a3787bdb112d9c974ebd29c4b4.tar.xz | |
drm/i915/uc: Sanitize uC when GT is sanitized
The microcontrollers are part of GT so it makes logical sense to have
them sanitized at the same time. This also fixed an issue with our
status tracking where the FW load status is not reset around
hibernation.
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190723091404.6449-2-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gem/i915_gem_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gem/i915_gem_pm.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c index 8faf262278ae..b5561cbdc5ea 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c @@ -239,7 +239,6 @@ void i915_gem_suspend_late(struct drm_i915_private *i915) } spin_unlock_irqrestore(&i915->mm.obj_lock, flags); - intel_uc_sanitize(&i915->gt.uc); i915_gem_sanitize(i915); } |