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| author | Mika Kuoppala <mika.kuoppala@linux.intel.com> | 2018-07-30 15:06:36 +0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2018-08-06 21:18:04 +0300 |
| commit | 497bfb706844892d07495f2ed5dff977fede5e25 (patch) | |
| tree | 963802dfe69759df5d6c1793ba7e28332980fad3 /drivers/gpu/drm/i915/dvo_ns2501.c | |
| parent | 027063b1606fea6df15c270e5f2a072d1dfa8fef (diff) | |
| download | linux-497bfb706844892d07495f2ed5dff977fede5e25.tar.xz | |
Revert "drm/i915/icl: WaEnableFloatBlendOptimization"
The register for 0xe420 is unable to hold any value, including
this bit. The documentation is also mixed between having a
register bit for toggle and having a state command setup
for it. Apparently the register toggle is deprecated.
Remove the register toggle as evidence shows it's futile.
The thing remaining is an apology and humble request for
Mesa folks to resurrect their state setup for this as they
were on right track from start.
This reverts commit 0bf059f3532bb39c52d917142206a8554fc2f1c5.
Fixes: 0bf059f3532b ("drm/i915/icl: WaEnableFloatBlendOptimization")
References: HSDES#1406393558
Cc: Oscar Mateo <oscar.mateo@intel.com>
Cc: Anuj Phogat <anuj.phogat@gmail.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180730120636.26958-1-mika.kuoppala@linux.intel.com
(cherry picked from commit c358514ba8da9e235876db1628cedd19a35803c6)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/dvo_ns2501.c')
0 files changed, 0 insertions, 0 deletions