diff options
| author | José Roberto de Souza <jose.souza@intel.com> | 2019-10-22 01:34:08 +0300 |
|---|---|---|
| committer | José Roberto de Souza <jose.souza@intel.com> | 2019-10-26 01:58:07 +0300 |
| commit | 2d69c42e373fa1ae2d4e27f7b11e61978d07c6d3 (patch) | |
| tree | f91cb6b5969635fdfb9b6a90c551e66e69472148 /drivers/gpu/drm/i915/display | |
| parent | c442292a661bec3a32cf2a351c53c5f07da20e21 (diff) | |
| download | linux-2d69c42e373fa1ae2d4e27f7b11e61978d07c6d3.tar.xz | |
drm/i915/tc: Clear DKL_TX_PMD_LANE_SUS before program voltage swing
This sequence was recently added to fix internal HW sequences to
reset TC ports.
HSDES: 1507287614
HSDES: 14010071447
BSpec: 49292
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191021223408.87344-1-jose.souza@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_ddi.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 1a49266f4f57..c596b1f74fee 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -2838,6 +2838,8 @@ tgl_dkl_phy_ddi_vswing_sequence(struct intel_encoder *encoder, int link_clock, for (ln = 0; ln < 2; ln++) { I915_WRITE(HIP_INDEX_REG(tc_port), HIP_INDEX_VAL(tc_port, ln)); + I915_WRITE(DKL_TX_PMD_LANE_SUS(tc_port), 0); + /* All the registers are RMW */ val = I915_READ(DKL_TX_DPCNTL0(tc_port)); val &= ~dpcnt_mask; |