diff options
author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-02-25 20:11:13 +0300 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-05-16 00:16:46 +0300 |
commit | 3cf43cdc63fbc3df19ea8398e9b8717ab44a6304 (patch) | |
tree | f44dea78b52a3e8888d7f182387cffc7d75b90ac /drivers/gpu/drm/i915/display/intel_display_power.c | |
parent | 56f48c1d44f6b884eed2ef8fdf5172bc295ff973 (diff) | |
download | linux-3cf43cdc63fbc3df19ea8398e9b8717ab44a6304.tar.xz |
drm/i915: Introduce proper dbuf state
Add a global state to track the dbuf slices. Gets rid of all the nasty
coupling between state->modeset and dbuf recomputation. Also we can now
totally nuke state->active_pipe_changes.
dev_priv->wm.distrust_bios_wm still remains, but that too will get
nuked soon.
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200225171125.28885-9-ville.syrjala@linux.intel.com
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_display_power.c')
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_display_power.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index a3e581947bec..7a8213993110 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -1161,7 +1161,7 @@ static bool gen9_dc_off_power_well_enabled(struct drm_i915_private *dev_priv, static void gen9_assert_dbuf_enabled(struct drm_i915_private *dev_priv) { u8 hw_enabled_dbuf_slices = intel_enabled_dbuf_slices_mask(dev_priv); - u8 enabled_dbuf_slices = dev_priv->enabled_dbuf_slices_mask; + u8 enabled_dbuf_slices = dev_priv->dbuf.enabled_slices; drm_WARN(&dev_priv->drm, hw_enabled_dbuf_slices != enabled_dbuf_slices, @@ -4539,14 +4539,14 @@ void gen9_dbuf_slices_update(struct drm_i915_private *dev_priv, for (slice = DBUF_S1; slice < num_slices; slice++) gen9_dbuf_slice_set(dev_priv, slice, req_slices & BIT(slice)); - dev_priv->enabled_dbuf_slices_mask = req_slices; + dev_priv->dbuf.enabled_slices = req_slices; mutex_unlock(&power_domains->lock); } static void gen9_dbuf_enable(struct drm_i915_private *dev_priv) { - dev_priv->enabled_dbuf_slices_mask = + dev_priv->dbuf.enabled_slices = intel_enabled_dbuf_slices_mask(dev_priv); /* @@ -4554,7 +4554,7 @@ static void gen9_dbuf_enable(struct drm_i915_private *dev_priv) * figure out later which slices we have and what we need. */ gen9_dbuf_slices_update(dev_priv, BIT(DBUF_S1) | - dev_priv->enabled_dbuf_slices_mask); + dev_priv->dbuf.enabled_slices); } static void gen9_dbuf_disable(struct drm_i915_private *dev_priv) |