diff options
| author | Andrzej Hajda <a.hajda@samsung.com> | 2016-03-23 16:15:12 +0300 |
|---|---|---|
| committer | Inki Dae <daeinki@gmail.com> | 2016-04-29 19:03:54 +0300 |
| commit | 4677f51ade432987f01062abad9e4cf60fd33f7d (patch) | |
| tree | 69e4da85beda6745dab2033fb23790e504a7edd6 /drivers/gpu/drm/exynos/exynos_hdmi.c | |
| parent | 50ec220eb4e3c90b3d7d40c679e19a0b61de162c (diff) | |
| download | linux-4677f51ade432987f01062abad9e4cf60fd33f7d.tar.xz | |
drm/exynos/hdmi: fix PHY configuration sequence
Proper PHY configuration should be as follow:
1. set HDMI clock parents to OSCCLK.
2. reconfigure PHY.
3. set HDMI clock parents to PHY.
4. wait for PLL stabilization.
The patch fixes it and consolidates the code.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'drivers/gpu/drm/exynos/exynos_hdmi.c')
| -rw-r--r-- | drivers/gpu/drm/exynos/exynos_hdmi.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 06105feb6c87..8faf3151242a 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -1654,15 +1654,11 @@ static void hdmi_mode_apply(struct hdmi_context *hdata) else hdmi_v14_mode_apply(hdata); - hdmiphy_wait_for_pll(hdata); - hdmi_clk_set_parents(hdata, true); hdmi_start(hdata, true); } static void hdmiphy_conf_reset(struct hdmi_context *hdata) { - hdmi_clk_set_parents(hdata, false); - hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, ~0, HDMI_PHY_SW_RSTOUT); usleep_range(10000, 12000); hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, 0, HDMI_PHY_SW_RSTOUT); @@ -1680,29 +1676,33 @@ static void hdmiphy_enable_mode_set(struct hdmi_context *hdata, bool enable) static void hdmiphy_conf_apply(struct hdmi_context *hdata) { int ret; - int i; + const u8 *phy_conf; - i = hdmi_find_phy_conf(hdata, hdata->current_mode.clock * 1000); - if (i < 0) { + ret = hdmi_find_phy_conf(hdata, hdata->current_mode.clock * 1000); + if (ret < 0) { DRM_ERROR("failed to find hdmiphy conf\n"); return; } + phy_conf = hdata->drv_data->phy_confs.data[ret].conf; + + hdmi_clk_set_parents(hdata, false); + + hdmiphy_conf_reset(hdata); hdmiphy_enable_mode_set(hdata, true); - ret = hdmiphy_reg_write_buf(hdata, 0, - hdata->drv_data->phy_confs.data[i].conf, 32); + ret = hdmiphy_reg_write_buf(hdata, 0, phy_conf, 32); if (ret) { DRM_ERROR("failed to configure hdmiphy\n"); return; } hdmiphy_enable_mode_set(hdata, false); - + hdmi_clk_set_parents(hdata, true); usleep_range(10000, 12000); + hdmiphy_wait_for_pll(hdata); } static void hdmi_conf_apply(struct hdmi_context *hdata) { - hdmiphy_conf_reset(hdata); hdmiphy_conf_apply(hdata); hdmi_start(hdata, false); hdmi_conf_init(hdata); |