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authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>2023-12-04 14:42:15 +0300
committerBoris Brezillon <boris.brezillon@collabora.com>2023-12-05 13:39:59 +0300
commit157ad4ccff0754d9eb57d3a4fa31264ee6e9716b (patch)
tree176949e7457bcf2a3a3cd91f416330410d1dc812 /drivers/gpu/drm/drm_gpuvm.c
parentb98e9a84d38ac88f9fd2accbcd45b656eeea7a04 (diff)
downloadlinux-157ad4ccff0754d9eb57d3a4fa31264ee6e9716b.tar.xz
drm/panfrost: Synchronize and disable interrupts before powering off
To make sure that we don't unintentionally perform any unclocked and/or unpowered R/W operation on GPU registers, before turning off clocks and regulators we must make sure that no GPU, JOB or MMU ISR execution is pending: doing that requires to add a mechanism to synchronize the interrupts on suspend. Add functions panfrost_{gpu,job,mmu}_suspend_irq() which will perform interrupts masking and ISR execution synchronization, and then call those in the panfrost_device_runtime_suspend() handler in the exact sequence of job (may require mmu!) -> mmu -> gpu. As a side note, JOB and MMU suspend_irq functions needed some special treatment: as their interrupt handlers will unmask interrupts, it was necessary to add an `is_suspended` bitmap which is used to address the possible corner case of unintentional IRQ unmasking because of ISR execution after a call to synchronize_irq(). At resume, clear each is_suspended bit in the reset path of JOB/MMU to allow unmasking the interrupts. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Steven Price <steven.price@arm.com> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231204114215.54575-4-angelogioacchino.delregno@collabora.com
Diffstat (limited to 'drivers/gpu/drm/drm_gpuvm.c')
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