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| author | Aditya Swarup <aditya.swarup@intel.com> | 2021-01-25 17:07:49 +0300 |
|---|---|---|
| committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2021-01-26 18:10:45 +0300 |
| commit | d6d2bc996e45073db16d1da1dde2116f3c86955c (patch) | |
| tree | 4622aa8e434e1def3733ddecc9d7bb11c520e38e /drivers/gpu/drm/drm_atomic_helper.c | |
| parent | 80d0f76588b55e5226d65776bb5fca7360837f1d (diff) | |
| download | linux-d6d2bc996e45073db16d1da1dde2116f3c86955c.tar.xz | |
drm/i915/adl_s: Configure Port clock registers for ADL-S
Add changes to configure port clock registers for ADL-S. Combo phy port
clocks are configured by DPCLKA_CFGCR0 and DPCLKA_CFGCR1 registers.
The DDI to internal clock mappings in DPCLKA_CFGCR0 register for ADL-S
translates to
DDI A -> DDIA
DDI B -> USBC1
DDI I -> USBC2
For DPCLKA_CFGCR1
DDI J -> USBC3
DDI K -> USBC4
Bspec: 50287
Bspec: 53812
Bspec: 53723
v2: Replace I915_READ() with intel_de_read().(Jani)
v3:
- Use reg variable to assign ADLS specific registers inorder to replace
branching with intel_de_read/write() calls.(mdroper)
- Reuse icl_get_ddi_pll() for ADLS to fix issue with updating active
dpll on driver load.(aswarup)
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210125140753.347998-7-aditya.swarup@intel.com
Diffstat (limited to 'drivers/gpu/drm/drm_atomic_helper.c')
0 files changed, 0 insertions, 0 deletions