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author | Russell King <rmk+kernel@armlinux.org.uk> | 2018-07-02 00:11:27 +0300 |
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committer | Russell King <rmk+kernel@armlinux.org.uk> | 2019-05-17 14:16:32 +0300 |
commit | 5a6cbce823bfa13f4ef47049b9ba861e432d5bd2 (patch) | |
tree | 721dedb76ba1b7302d6e4aa44213675fea7475e1 /drivers/gpu/drm/armada/armada_510.c | |
parent | f79d7c9543d2318aff29edd1bbcc142301eb75c2 (diff) | |
download | linux-5a6cbce823bfa13f4ef47049b9ba861e432d5bd2.tar.xz |
drm/armada: add and use definitions for RDREG4F
Add and use bit definitions for RDREG4F on Dove Armada 510.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'drivers/gpu/drm/armada/armada_510.c')
-rw-r--r-- | drivers/gpu/drm/armada/armada_510.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/gpu/drm/armada/armada_510.c b/drivers/gpu/drm/armada/armada_510.c index 0e91d27921bd..370c422f64e3 100644 --- a/drivers/gpu/drm/armada/armada_510.c +++ b/drivers/gpu/drm/armada/armada_510.c @@ -24,8 +24,13 @@ static int armada510_crtc_init(struct armada_crtc *dcrtc, struct device *dev) dcrtc->extclk[0] = clk; - /* Lower the watermark so to eliminate jitter at higher bandwidths */ - armada_updatel(0x20, (1 << 11) | 0xff, dcrtc->base + LCD_CFG_RDREG4F); + /* + * Lower the watermark so to eliminate jitter at higher bandwidths. + * Disable SRAM read wait state to avoid system hang with external + * clock. + */ + armada_updatel(CFG_DMA_WM(0x20), CFG_SRAM_WAIT | CFG_DMA_WM_MASK, + dcrtc->base + LCD_CFG_RDREG4F); /* Initialise SPU register */ writel_relaxed(ADV_HWC32ENABLE | ADV_HWC32ARGB | ADV_HWC32BLEND, |