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| author | Dave Airlie <airlied@redhat.com> | 2026-06-03 09:41:52 +0300 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2026-06-03 09:42:07 +0300 |
| commit | 9bb8af2770b7b24619e0f95422322dd55384f7ca (patch) | |
| tree | 017738d3db84650d7af7ebded6a4e9c59ee237f6 /drivers/gpu/drm/amd/include/dm_pp_interface.h | |
| parent | fe017012c5825f22bd856249e4f3cf57e31027b8 (diff) | |
| parent | 470d1ae31d29f90b8998c5c08ee0b267a05fe378 (diff) | |
| download | linux-9bb8af2770b7b24619e0f95422322dd55384f7ca.tar.xz | |
Merge tag 'amd-drm-next-7.2-2026-05-29' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-7.2-2026-05-29:
amdgpu:
- GEM_OP warning fix
- GEM_OP locking fix
- Userq fixes
- DCN 2.1 refclk fix
- SI fixes
- HMM fixes
- Add DC KUNIT tests
- UML fixes
- Switch to system_dfl_wq
- Old DC power state cleanup
- RAS fixes
amdkfd:
- svm_range_set_attr locking fix
- CRIU restore fix
- KFD debugger fix
radeon:
- Use struct drm_edid instead of struct edid
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patch.msgid.link/20260529214346.2328355-1-alexander.deucher@amd.com
Diffstat (limited to 'drivers/gpu/drm/amd/include/dm_pp_interface.h')
| -rw-r--r-- | drivers/gpu/drm/amd/include/dm_pp_interface.h | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/drivers/gpu/drm/amd/include/dm_pp_interface.h b/drivers/gpu/drm/amd/include/dm_pp_interface.h index 349544504c93..e3d40fb37103 100644 --- a/drivers/gpu/drm/amd/include/dm_pp_interface.h +++ b/drivers/gpu/drm/amd/include/dm_pp_interface.h @@ -113,24 +113,6 @@ struct amd_pp_display_configuration { struct amd_pp_simple_clock_info { uint32_t engine_max_clock; uint32_t memory_max_clock; - uint32_t level; -}; - -enum PP_DAL_POWERLEVEL { - PP_DAL_POWERLEVEL_INVALID = 0, - PP_DAL_POWERLEVEL_ULTRALOW, - PP_DAL_POWERLEVEL_LOW, - PP_DAL_POWERLEVEL_NOMINAL, - PP_DAL_POWERLEVEL_PERFORMANCE, - - PP_DAL_POWERLEVEL_0 = PP_DAL_POWERLEVEL_ULTRALOW, - PP_DAL_POWERLEVEL_1 = PP_DAL_POWERLEVEL_LOW, - PP_DAL_POWERLEVEL_2 = PP_DAL_POWERLEVEL_NOMINAL, - PP_DAL_POWERLEVEL_3 = PP_DAL_POWERLEVEL_PERFORMANCE, - PP_DAL_POWERLEVEL_4 = PP_DAL_POWERLEVEL_3+1, - PP_DAL_POWERLEVEL_5 = PP_DAL_POWERLEVEL_4+1, - PP_DAL_POWERLEVEL_6 = PP_DAL_POWERLEVEL_5+1, - PP_DAL_POWERLEVEL_7 = PP_DAL_POWERLEVEL_6+1, }; struct amd_pp_clock_info { @@ -142,7 +124,6 @@ struct amd_pp_clock_info { uint32_t max_bus_bandwidth; uint32_t max_engine_clock_in_sr; uint32_t min_engine_clock_in_sr; - enum PP_DAL_POWERLEVEL max_clocks_state; }; enum amd_pp_clock_type { |