drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCN

No need for a separate flag now that DCN3.1 is not in bring up.
Fold into DRM_AMD_DC_DCN like previous DCN IPs.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

3 files changed, 6 insertions, 27 deletions

diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c
index 62dd89cf70bb..1a0f7c3dc964 100644
--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c
+++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c
@@ -172,10 +172,8 @@ char *mod_hdcp_status_to_str(int32_t status)
 		return "MOD_HDCP_STATUS_HDCP2_REAUTH_LINK_INTEGRITY_FAILURE";
 	case MOD_HDCP_STATUS_HDCP2_DEVICE_COUNT_MISMATCH_FAILURE:
 		return "MOD_HDCP_STATUS_HDCP2_DEVICE_COUNT_MISMATCH_FAILURE";
-#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
 	case MOD_HDCP_STATUS_UNSUPPORTED_PSP_VER_FAILURE:
 		return "MOD_HDCP_STATUS_UNSUPPORTED_PSP_VER_FAILURE";
-#endif
 	default:
 		return "MOD_HDCP_STATUS_UNKNOWN";
 	}
diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c
index fc88fe249a50..1b02056bc8bd 100644
--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c
+++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c
@@ -44,13 +44,9 @@ static void hdcp2_message_init(struct mod_hdcp *hdcp,
 	in->process.msg3_desc.msg_id = TA_HDCP_HDCP2_MSG_ID__NULL_MESSAGE;
 	in->process.msg3_desc.msg_size = 0;
 }
-#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
+
 static enum mod_hdcp_status mod_hdcp_remove_display_from_topology_v2(
 		struct mod_hdcp *hdcp, uint8_t index)
-#else
-enum mod_hdcp_status mod_hdcp_remove_display_from_topology(
-		struct mod_hdcp *hdcp, uint8_t index)
-#endif
 {
 	struct psp_context *psp = hdcp->config.psp.handle;
 	struct ta_dtm_shared_memory *dtm_cmd;
@@ -84,7 +80,7 @@ enum mod_hdcp_status mod_hdcp_remove_display_from_topology(
 	mutex_unlock(&psp->dtm_context.mutex);
 	return status;
 }
-#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
+
 static enum mod_hdcp_status mod_hdcp_remove_display_from_topology_v3(
 		struct mod_hdcp *hdcp, uint8_t index)
 {
@@ -136,14 +132,9 @@ enum mod_hdcp_status mod_hdcp_remove_display_from_topology(
 
 	return status;
 }
-#endif
-#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
+
 static enum mod_hdcp_status mod_hdcp_add_display_to_topology_v2(
 		struct mod_hdcp *hdcp, struct mod_hdcp_display *display)
-#else
-enum mod_hdcp_status mod_hdcp_add_display_to_topology(struct mod_hdcp *hdcp,
-					       struct mod_hdcp_display *display)
-#endif
 {
 	struct psp_context *psp = hdcp->config.psp.handle;
 	struct ta_dtm_shared_memory *dtm_cmd;
@@ -189,7 +180,6 @@ enum mod_hdcp_status mod_hdcp_add_display_to_topology(struct mod_hdcp *hdcp,
 	return status;
 }
 
-#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
 static enum mod_hdcp_status mod_hdcp_add_display_to_topology_v3(
 		struct mod_hdcp *hdcp, struct mod_hdcp_display *display)
 {
@@ -254,7 +244,7 @@ enum mod_hdcp_status mod_hdcp_add_display_to_topology(struct mod_hdcp *hdcp,
 
 	return status;
 }
-#endif
+
 enum mod_hdcp_status mod_hdcp_hdcp1_create_session(struct mod_hdcp *hdcp)
 {
 
diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.h b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.h
index b0b2544eaa9d..2937b4b61461 100644
--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.h
+++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.h
@@ -44,12 +44,8 @@ enum bgd_security_hdcp2_content_type {
 enum ta_dtm_command {
 	TA_DTM_COMMAND__UNUSED_1 = 1,
 	TA_DTM_COMMAND__TOPOLOGY_UPDATE_V2,
-#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
 	TA_DTM_COMMAND__TOPOLOGY_ASSR_ENABLE,
 	TA_DTM_COMMAND__TOPOLOGY_UPDATE_V3
-#else
-	TA_DTM_COMMAND__TOPOLOGY_ASSR_ENABLE
-#endif
 };
 
 /* DTM related enumerations */
@@ -91,7 +87,6 @@ struct ta_dtm_topology_update_input_v2 {
 	uint32_t max_hdcp_supported_version;
 };
 
-#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
 /* For security reason/HW may change value, these encoder type enum values are not HW register values */
 /* Security code will check real HW register values and these SW enum values */
 enum ta_dtm_encoder_type {
@@ -117,7 +112,7 @@ struct ta_dtm_topology_update_input_v3 {
 	uint32_t phy_id;
 	uint32_t link_hdcp_cap;
 };
-#endif
+
 struct ta_dtm_topology_assr_enable {
 	uint32_t display_topology_dig_be_index;
 };
@@ -131,9 +126,7 @@ struct ta_dtm_topology_assr_enable {
 union ta_dtm_cmd_input {
 	struct ta_dtm_topology_update_input_v2 topology_update_v2;
 	struct ta_dtm_topology_assr_enable topology_assr_enable;
-#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
 	struct ta_dtm_topology_update_input_v3 topology_update_v3;
-#endif
 };
 
 union ta_dtm_cmd_output {
@@ -313,10 +306,8 @@ enum ta_hdcp2_version {
 	TA_HDCP2_VERSION_UNKNOWN = 0,
 	TA_HDCP2_VERSION_2_0 = 20,
 	TA_HDCP2_VERSION_2_1 = 21,
-#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
+	TA_HDCP2_VERSION_2_2 = 22,
 	TA_HDCP2_VERSION_2_3 = 23,
-#endif
-	TA_HDCP2_VERSION_2_2 = 22
 };
 
 /* input/output structures for HDCP commands */