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authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>2024-04-03 17:41:29 +0300
committerAlex Deucher <alexander.deucher@amd.com>2024-04-17 04:24:15 +0300
commite730c585237eb11f61d3e6555bf47e41c72d0626 (patch)
tree6f16317985cc6324c1f5077aa8bafa173401a28d /drivers/gpu/drm/amd/display/dmub
parentef319dff5475a2d7b9b61c0fb051a764237cd959 (diff)
downloadlinux-e730c585237eb11f61d3e6555bf47e41c72d0626.tar.xz
drm/amd/display: Pass sequential ONO bit to DMCUB boot options
[Why] IPS ono sequence ordering differs based on the ASIC. [How] Detect the ASIC ID revision and set the boot option accordingly. Feed it through the DCN35 DMUB functions. Reviewed-by: Sung joon Kim <sungjoon.kim@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dmub')
-rw-r--r--drivers/gpu/drm/amd/display/dmub/dmub_srv.h1
-rw-r--r--drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
index 662bdb0e5d3d..2fde1f043d50 100644
--- a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
+++ b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
@@ -297,6 +297,7 @@ struct dmub_srv_hw_params {
bool dpia_hpd_int_enable_supported;
bool disable_clock_gate;
bool disallow_dispclk_dppclk_ds;
+ bool ips_sequential_ono;
enum dmub_memory_access_type mem_access_type;
enum dmub_ips_disable_type disable_ips;
};
diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
index 98afaecd3984..70e63aeb8f89 100644
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
@@ -420,6 +420,7 @@ void dmub_dcn35_enable_dmub_boot_options(struct dmub_srv *dmub, const struct dmu
boot_options.bits.disable_clk_ds = params->disallow_dispclk_dppclk_ds;
boot_options.bits.disable_clk_gate = params->disable_clock_gate;
boot_options.bits.ips_disable = params->disable_ips;
+ boot_options.bits.ips_sequential_ono = params->ips_sequential_ono;
REG_WRITE(DMCUB_SCRATCH14, boot_options.all);
}