diff options
author | abdoulaye berthe <abdoulaye.berthe@amd.com> | 2019-07-24 18:01:44 +0300 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-11-13 23:29:43 +0300 |
commit | 64c12b733fe7eaffa9207e6f30b313595c6e6597 (patch) | |
tree | 81f8d74db85380b363384e11c44730cb9df3881b /drivers/gpu/drm/amd/display/dc/inc/link_hwss.h | |
parent | bad7ab0be9bea2a4128158751bc29ac4b1c3bce2 (diff) | |
download | linux-64c12b733fe7eaffa9207e6f30b313595c6e6597.tar.xz |
drm/amd/display: implement lttpr logic
1-If at least one repeater is present in the link and we are in non
transparent mode, perform clock recovery then channel equalization
with all repeaters one by one before training DPRX.
2-Mark the end of LT with a repeater by setting training pattern 0
at the end of channel equalization with each repeater.
Signed-off-by: abdoulaye berthe <abdoulaye.berthe@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/link_hwss.h')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/link_hwss.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/link_hwss.h b/drivers/gpu/drm/amd/display/dc/inc/link_hwss.h index 4eff5d38a2f9..9af7ee5bc8ee 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/link_hwss.h +++ b/drivers/gpu/drm/amd/display/dc/inc/link_hwss.h @@ -60,11 +60,13 @@ void dp_disable_link_phy_mst(struct dc_link *link, enum signal_type signal); bool dp_set_hw_training_pattern( struct dc_link *link, - enum dc_dp_training_pattern pattern); + enum dc_dp_training_pattern pattern, + uint32_t offset); void dp_set_hw_lane_settings( struct dc_link *link, - const struct link_training_settings *link_settings); + const struct link_training_settings *link_settings, + uint32_t offset); void dp_set_hw_test_pattern( struct dc_link *link, |