diff options
| author | Teeger <gateeger@amd.com> | 2024-06-19 16:26:40 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-07-01 23:06:53 +0300 |
| commit | 02b438afc63b79490abb3ce82acfd6b49b88b34e (patch) | |
| tree | 611765212c227c02dc930ef846b94bf5dc12eff7 /drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c | |
| parent | 73b8a388eb0c1328dab1161e42eed3d7b507764b (diff) | |
| download | linux-02b438afc63b79490abb3ce82acfd6b49b88b34e.tar.xz | |
drm/amd/display: Revert Add workaround to restrict max frac urgent for DPM0
This reverts commit 871512e36f9c1c2cb4e62eb860ca0438800e4d63
due to multiple issues found.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Teeger <gateeger@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c index c58235121474..d5dcc8b77281 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c +++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c @@ -626,21 +626,6 @@ static bool dml2_validate_and_build_resource(const struct dc *in_dc, struct dc_s if (result) { unsigned int lowest_state_idx = s->mode_support_params.out_lowest_state_idx; - double min_fclk_mhz_for_urgent_workaround = (double)dml2->config.min_fclk_for_urgent_workaround_khz / 1000.0; - double max_frac_urgent = (double)dml2->config.max_frac_urgent_for_min_fclk_x1000 / 1000.0; - - if (min_fclk_mhz_for_urgent_workaround > 0.0 && max_frac_urgent > 0.0 && - (dml2->v20.dml_core_ctx.mp.FractionOfUrgentBandwidth > max_frac_urgent || - dml2->v20.dml_core_ctx.mp.FractionOfUrgentBandwidthImmediateFlip > max_frac_urgent)) { - unsigned int forced_lowest_state_idx = lowest_state_idx; - - while (forced_lowest_state_idx < dml2->v20.dml_core_ctx.states.num_states && - dml2->v20.dml_core_ctx.states.state_array[forced_lowest_state_idx].fabricclk_mhz <= min_fclk_mhz_for_urgent_workaround) { - forced_lowest_state_idx += 1; - } - lowest_state_idx = forced_lowest_state_idx; - } - out_clks.dispclk_khz = (unsigned int)dml2->v20.dml_core_ctx.mp.Dispclk_calculated * 1000; out_clks.p_state_supported = s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_change_unsupported; if (in_dc->config.use_default_clock_table && |