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| author | Xiaojie Yuan <xiaojie.yuan@amd.com> | 2018-12-17 13:07:22 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-08-02 18:30:40 +0300 |
| commit | f2d6731d77cfbcdac9724e249cebdce0a75a2d00 (patch) | |
| tree | 127363c84e91954281cf9d6bea86d0301af1bf30 /drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | |
| parent | 6f523fd7b3d4e42d7d0e7591c8a121048d0142f8 (diff) | |
| download | linux-f2d6731d77cfbcdac9724e249cebdce0a75a2d00.tar.xz | |
drm/amdgpu/sdma5: add placeholder for navi12 golden settings
None yet.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c index ea28b309cf21..01d4faccc68f 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c @@ -98,6 +98,9 @@ static const struct soc15_reg_golden golden_settings_sdma_nv14[] = { SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000), }; +static const struct soc15_reg_golden golden_settings_sdma_nv12[] = { +}; + static u32 sdma_v5_0_get_reg_offset(struct amdgpu_device *adev, u32 instance, u32 internal_offset) { u32 base; @@ -135,6 +138,14 @@ static void sdma_v5_0_init_golden_registers(struct amdgpu_device *adev) golden_settings_sdma_nv14, (const u32)ARRAY_SIZE(golden_settings_sdma_nv14)); break; + case CHIP_NAVI12: + soc15_program_register_sequence(adev, + golden_settings_sdma_5, + (const u32)ARRAY_SIZE(golden_settings_sdma_5)); + soc15_program_register_sequence(adev, + golden_settings_sdma_nv12, + (const u32)ARRAY_SIZE(golden_settings_sdma_nv12)); + break; default: break; } |