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authorTom St Denis <tom.stdenis@amd.com>2018-02-26 17:09:26 +0300
committerAlex Deucher <alexander.deucher@amd.com>2018-02-28 23:19:21 +0300
commit82d0ece957bcd0e6d500759b205508dbda1bc265 (patch)
treecc51e290db6a567c5e6ddafc91968f26b0669e0a /drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
parentf812dec57d55719f5fe1f6fce193561015369363 (diff)
downloadlinux-82d0ece957bcd0e6d500759b205508dbda1bc265.tar.xz
drm/amd/amdgpu: Correct VRAM width for APUs with GMC9
DDR4 has a 64-bit width not 128-bits. It was reporting twice the width. Tested with my Ryzen 2400G. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 2719937e09d6..fd6370982c9a 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -682,7 +682,10 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
adev->mc.vram_width = amdgpu_atomfirmware_get_vram_width(adev);
if (!adev->mc.vram_width) {
/* hbm memory channel size */
- chansize = 128;
+ if (adev->flags & AMD_IS_APU)
+ chansize = 64;
+ else
+ chansize = 128;
tmp = RREG32_SOC15(DF, 0, mmDF_CS_AON0_DramBaseAddress0);
tmp &= DF_CS_AON0_DramBaseAddress0__IntLvNumChan_MASK;