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| author | Christian König <christian.koenig@amd.com> | 2015-05-11 15:10:34 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2015-06-04 04:03:32 +0300 |
| commit | d2edb07b10fce5127a60671b55ca53921c212bc3 (patch) | |
| tree | 5c6c7fe319aa67c5ca0a279008381f4a31d3cd22 /drivers/gpu/drm/amd/amdgpu/cik_sdma.c | |
| parent | 66782cec7ad8f48c09d96ee59b713f694265cfa1 (diff) | |
| download | linux-d2edb07b10fce5127a60671b55ca53921c212bc3.tar.xz | |
drm/amdgpu: cleanup HDP flush handling
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/cik_sdma.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 15 |
1 files changed, 3 insertions, 12 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c index 037e3db69547..d5055ea4d112 100644 --- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c +++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c @@ -188,8 +188,6 @@ static void cik_sdma_ring_set_wptr(struct amdgpu_ring *ring) WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[me], (ring->wptr << 2) & 0x3fffc); } -static void cik_sdma_hdp_flush_ring_emit(struct amdgpu_ring *); - /** * cik_sdma_ring_emit_ib - Schedule an IB on the DMA engine * @@ -204,9 +202,6 @@ static void cik_sdma_ring_emit_ib(struct amdgpu_ring *ring, u32 extra_bits = (ib->vm ? ib->vm->ids[ring->idx].id : 0) & 0xf; u32 next_rptr = ring->wptr + 5; - if (ib->flush_hdp_writefifo) - next_rptr += 6; - while ((next_rptr & 7) != 4) next_rptr++; @@ -217,11 +212,6 @@ static void cik_sdma_ring_emit_ib(struct amdgpu_ring *ring, amdgpu_ring_write(ring, 1); /* number of DWs to follow */ amdgpu_ring_write(ring, next_rptr); - if (ib->flush_hdp_writefifo) { - /* flush HDP */ - cik_sdma_hdp_flush_ring_emit(ring); - } - /* IB packet must end on a 8 DW boundary */ while ((ring->wptr & 7) != 4) amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0)); @@ -233,13 +223,13 @@ static void cik_sdma_ring_emit_ib(struct amdgpu_ring *ring, } /** - * cik_sdma_hdp_flush_ring_emit - emit an hdp flush on the DMA ring + * cik_sdma_ring_emit_hdp_flush - emit an hdp flush on the DMA ring * * @ring: amdgpu ring pointer * * Emit an hdp flush packet on the requested DMA ring. */ -static void cik_sdma_hdp_flush_ring_emit(struct amdgpu_ring *ring) +static void cik_sdma_ring_emit_hdp_flush(struct amdgpu_ring *ring) { u32 extra_bits = (SDMA_POLL_REG_MEM_EXTRA_OP(1) | SDMA_POLL_REG_MEM_EXTRA_FUNC(3)); /* == */ @@ -1317,6 +1307,7 @@ static const struct amdgpu_ring_funcs cik_sdma_ring_funcs = { .emit_fence = cik_sdma_ring_emit_fence, .emit_semaphore = cik_sdma_ring_emit_semaphore, .emit_vm_flush = cik_sdma_ring_emit_vm_flush, + .emit_hdp_flush = cik_sdma_ring_emit_hdp_flush, .test_ring = cik_sdma_ring_test_ring, .test_ib = cik_sdma_ring_test_ib, .is_lockup = cik_sdma_ring_is_lockup, |