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authorAhmad Fatoum <a.fatoum@pengutronix.de>2025-02-18 21:26:41 +0300
committerAbel Vesa <abel.vesa@linaro.org>2025-03-03 20:02:06 +0300
commitd5992f1af1550a9e11e42cfa2ca1ad2a1b7fd7f3 (patch)
treebe0aa95a405df2bb5b7d4def9183eb1ed3f76d4f /drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
parent91be7d27099dedf813b80702e4ca117d1fb38ce6 (diff)
downloadlinux-d5992f1af1550a9e11e42cfa2ca1ad2a1b7fd7f3.tar.xz
dt-bindings: clock: imx8m: document nominal/overdrive properties
The imx8m-clock.yaml binding covers the clock controller inside all of the i.MX8M Q/M/N/P SoCs. All of them have in common that they support two operating modes: nominal and overdrive mode. While the overdrive mode allows for higher frequencies for many IPs, the nominal mode needs a lower SoC voltage, thereby reducing heat generation and power usage. As increasing clock rates beyond the maximum permitted by the supplied SoC voltage can lead to difficult to debug issues, device tree consumers would benefit from knowing what mode is active to enforce the clock rate limits that come with it. To facilitate this, extend the clock controller bindings with an optional fsl,operating-mode property. This intentionally allows the absence of the property, because there is no default suitable for all boards: For i.MX8M Mini and Nano, the kernel SoC DTSIs has assigned-clock-rates that are all achievable in nominal mode. For i.MX8MP, there are some rates only validated for overdrive mode. But even for the i.MX8M Mini/Nano boards, we don't know what rates they may configure at runtime, so it has not been possible so far to infer from just the device tree what the mode is. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.kernel.org/r/20250218-imx8m-clk-v4-1-b7697dc2dcd0@pengutronix.de Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
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