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authorLucas De Marchi <lucas.demarchi@intel.com>2019-07-13 04:09:19 +0300
committerLucas De Marchi <lucas.demarchi@intel.com>2019-07-27 01:02:17 +0300
commit98a5c2a3582a86d5acdcdeabbe0e6278e712201e (patch)
tree69a3b06d302a0a3eaf1f0befbe66bfff59108e1f /drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
parent08f0e4a7ecb9e20f27b9d410bcba84e662fffe3b (diff)
downloadlinux-98a5c2a3582a86d5acdcdeabbe0e6278e712201e.tar.xz
drm/i915/tgl: skip setting PORT_CL_DW12_* on initialization
According to the spec when initializing the display in TGL we should not set PORT_CL_DW12 for the Aux channel of the combo PHYs. We will re-use the power well hooks from ICL so only set this register on gen < 12. v2: Generalize check for gen 12 (suggested by José) v3: Rebase after enum phy introduction Cc: Imre Deak <imre.deak@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190713010940.17711-2-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_object.c')
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