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| author | Samuel Holland <samuel.holland@sifive.com> | 2025-09-10 01:41:27 +0300 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2025-09-11 21:13:21 +0300 |
| commit | 941327ca5ddd45cfc4dd960cbbabed9e2b5cb1b0 (patch) | |
| tree | 5de5229522d713a39c0d385d2148f28eb2f0f644 /drivers/fpga/zynq-fpga.c | |
| parent | 4fab69dd1fa52e28bb692afcb159fa8807d6d03f (diff) | |
| download | linux-941327ca5ddd45cfc4dd960cbbabed9e2b5cb1b0.tar.xz | |
cache: sifive_ccache: Optimize cache flushes
Fence instructions are required only at the beginning and the end of
a flush operation, not separately for each cache line being flushed.
Speed up cache flushes by about 15% by removing the extra fences.
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'drivers/fpga/zynq-fpga.c')
0 files changed, 0 insertions, 0 deletions