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| author | Lukas Stockmann <lukas.stockmann@siemens.com> | 2025-01-20 12:34:49 +0300 |
|---|---|---|
| committer | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2025-04-01 12:28:48 +0300 |
| commit | 2b7cbd98495f6ee4cd6422fe77828a19e9edf87f (patch) | |
| tree | 361761a4ecf9e5c295abc3e23f9bea2ec694fb74 /drivers/fpga/xilinx-spi.c | |
| parent | a4193578631b7c55eae31f52cef6b0f09203fd17 (diff) | |
| download | linux-2b7cbd98495f6ee4cd6422fe77828a19e9edf87f.tar.xz | |
rtc: pcf85063: do a SW reset if POR failed
Power-on Reset has a documented issue in PCF85063, refer to its datasheet,
section "Software reset":
"There is a low probability that some devices will have corruption of the
registers after the automatic power-on reset if the device is powered up
with a residual VDD level. It is required that the VDD starts at zero volts
at power up or upon power cycling to ensure that there is no corruption of
the registers. If this is not possible, a reset must be initiated after
power-up (i.e. when power is stable) with the software reset command"
Trigger SW reset if there is an indication that POR has failed.
Link: https://www.nxp.com/docs/en/data-sheet/PCF85063A.pdf
Signed-off-by: Lukas Stockmann <lukas.stockmann@siemens.com>
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Link: https://lore.kernel.org/r/20250120093451.30778-1-alexander.sverdlin@siemens.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'drivers/fpga/xilinx-spi.c')
0 files changed, 0 insertions, 0 deletions