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| author | Christian Marangi <ansuelsmth@gmail.com> | 2025-04-01 16:50:21 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2025-04-15 10:59:04 +0300 |
| commit | 457d9772e8a5cdae64f66b5f7d5b0247365191ec (patch) | |
| tree | a9a82b32bd5e2260062aeec68c7dbf6111183049 /drivers/fpga/tests/fpga-bridge-test.c | |
| parent | e56088a13708757da68ad035269d69b93ac8c389 (diff) | |
| download | linux-457d9772e8a5cdae64f66b5f7d5b0247365191ec.tar.xz | |
pinctrl: airoha: fix wrong PHY LED mapping and PHY2 LED defines
The current PHY2 LED define are wrong and actually set BITs outside the
related mask. Fix it and set the correct value. While at it, also use
FIELD_PREP_CONST macro to make it simple to understand what values are
actually applied for the mask.
Also fix wrong PHY LED mapping. The SoC Switch supports up to 4 port but
the register define mapping for 5 PHY port, starting from 0. The mapping
was wrongly defined starting from PHY1. Reorder the function group to
start from PHY0. PHY4 is actually never supported as we don't have a
GPIO pin to assign.
Cc: stable@vger.kernel.org
Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC")
Reviewed-by: Benjamin Larsson <benjamin.larsson@genexis.eu>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/20250401135026.18018-1-ansuelsmth@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/fpga/tests/fpga-bridge-test.c')
0 files changed, 0 insertions, 0 deletions