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authorOrange Kao <orange@aiven.io>2024-11-06 14:35:46 +0300
committerTony Luck <tony.luck@intel.com>2024-11-09 00:36:55 +0300
commite14232afa94445e03fc3a0291b07a68f3408c120 (patch)
tree2a5c5f41065b99231d13dbfd04cd4ae6d4e3bc5a /drivers/edac/ti_edac.c
parent1d512b1aa5a88f93170b0b9360de4fff7a2f8a0a (diff)
downloadlinux-e14232afa94445e03fc3a0291b07a68f3408c120.tar.xz
EDAC/igen6: Add polling support
Some PCs with Intel N100 (with PCI device 8086:461c, DID_ADL_N_SKU4) experienced issues with error interrupts not working, even with the following configuration in the BIOS. In-Band ECC Support: Enabled In-Band ECC Operation Mode: 2 (make all requests protected and ignore range checks) IBECC Error Injection Control: Inject Correctable Error on insertion counter Error Injection Insertion Count: 251658240 (0xf000000) Add polling mode support for these machines to ensure that memory error events are handled. Signed-off-by: Orange Kao <orange@aiven.io> Signed-off-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Link: https://lore.kernel.org/all/20241106114024.941659-3-orange@aiven.io
Diffstat (limited to 'drivers/edac/ti_edac.c')
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