diff options
| author | Marc Bevand <m@zorinaq.com> | 2021-12-22 02:31:12 +0300 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2021-12-24 12:53:41 +0300 |
| commit | 0b8bf9cb142da59a14622bba168ebcd6d0a54499 (patch) | |
| tree | 74f69731dae1a1fb181b2b8b514d38e1431da08d /drivers/edac/amd64_edac.c | |
| parent | e2be5955a88664421b25e463c28a910b8dbd534c (diff) | |
| download | linux-0b8bf9cb142da59a14622bba168ebcd6d0a54499.tar.xz | |
EDAC/amd64: Add support for family 19h, models 50h-5fh
Add the new family 19h models 50h-5fh PCI IDs (device 18h functions 0
and 6) to support Ryzen 5000 APUs ("Cezanne").
Signed-off-by: Marc Bevand <m@zorinaq.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com>
Link: https://lore.kernel.org/r/20211221233112.556927-1-m@zorinaq.com
Diffstat (limited to 'drivers/edac/amd64_edac.c')
| -rw-r--r-- | drivers/edac/amd64_edac.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index c6c58f01067f..f8ef2edf8abf 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -2660,6 +2660,16 @@ static struct amd64_family_type family_types[] = { .dbam_to_cs = f17_addr_mask_to_cs_size, } }, + [F19_M50H_CPUS] = { + .ctl_name = "F19h_M50h", + .f0_id = PCI_DEVICE_ID_AMD_19H_M50H_DF_F0, + .f6_id = PCI_DEVICE_ID_AMD_19H_M50H_DF_F6, + .max_mcs = 2, + .ops = { + .early_channel_count = f17_early_channel_count, + .dbam_to_cs = f17_addr_mask_to_cs_size, + } + }, }; /* @@ -3706,6 +3716,11 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt) pvt->ops = &family_types[F17_M70H_CPUS].ops; fam_type->ctl_name = "F19h_M20h"; break; + } else if (pvt->model >= 0x50 && pvt->model <= 0x5f) { + fam_type = &family_types[F19_M50H_CPUS]; + pvt->ops = &family_types[F19_M50H_CPUS].ops; + fam_type->ctl_name = "F19h_M50h"; + break; } else if (pvt->model >= 0xa0 && pvt->model <= 0xaf) { fam_type = &family_types[F19_M10H_CPUS]; pvt->ops = &family_types[F19_M10H_CPUS].ops; |