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| author | Thomas Breitung <thomas.breitung@izt-labs.de> | 2017-06-19 17:40:04 +0300 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2017-06-22 16:01:35 +0300 |
| commit | ccc077292733f3143b444255fa5ec49a8ff2763b (patch) | |
| tree | f867c7838c806b891adcb7e3c955d5e8bbe74817 /drivers/dma/qcom/hidma_mgmt.c | |
| parent | 036e9ef8becde736e693be4f4bef56d5b56fc298 (diff) | |
| download | linux-ccc077292733f3143b444255fa5ec49a8ff2763b.tar.xz | |
dmaengine: fsldma: set BWC, DAHTS and SAHTS values correctly
The bits of BWC, DAHTS and SAHTS in the DMA mode register must be cleared
before a new value can be or-ed in.
Signed-off-by: Thomas Breitung <thomas.breitung@izt-labs.de>
Signed-off-by: Wolfgang Ocker <weo@reccoware.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/qcom/hidma_mgmt.c')
0 files changed, 0 insertions, 0 deletions