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authorPandith N <pandith.n@intel.com>2021-08-02 08:54:53 +0300
committerVinod Koul <vkoul@kernel.org>2021-08-02 09:49:52 +0300
commitf95f3b53513d4bd846169fc42705548609494cce (patch)
treec64933994ffb99fdeba5ba9b55798a9446c6e406 /drivers/dma/dw-axi-dmac/dw-axi-dmac.h
parent32286e2793858a8491c2276b2754e9850467bb6b (diff)
downloadlinux-f95f3b53513d4bd846169fc42705548609494cce.tar.xz
dmaengine: dw-axi-dmac: support parallel memory <--> peripheral transfers
Added support for multiple DMA_MEM_TO_DEV, DMA_DEV_TO_MEM transfers in parallel. This is required for peripherals using DMA for transmit and receive operations at the same time. APB slot number needs to be programmed in channel hardware handshaking interface Signed-off-by: Pandith N <pandith.n@intel.com> Tested-by: Pan Kris <kris.pan@intel.com> Link: https://lore.kernel.org/r/20210802055454.15192-3-pandith.n@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/dw-axi-dmac/dw-axi-dmac.h')
-rw-r--r--drivers/dma/dw-axi-dmac/dw-axi-dmac.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
index 358f553cafe9..380005afde16 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
@@ -258,6 +258,8 @@ enum {
/* CH_CFG_H */
#define CH_CFG_H_PRIORITY_POS 17
+#define CH_CFG_H_DST_PER_POS 12
+#define CH_CFG_H_SRC_PER_POS 7
#define CH_CFG_H_HS_SEL_DST_POS 4
#define CH_CFG_H_HS_SEL_SRC_POS 3
enum {