diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2023-10-18 09:16:59 +0300 |
|---|---|---|
| committer | Chanwoo Choi <cw00.choi@samsung.com> | 2023-10-19 14:46:17 +0300 |
| commit | 038ff6f53da07971a9df636bcc9bf1344c468dd5 (patch) | |
| tree | 84f7d29ca167691e3cfd0f61ead87194afae8da7 /drivers/devfreq/event | |
| parent | 076b0597f5b6fbec47cddedf9b39d864938a365c (diff) | |
| download | linux-038ff6f53da07971a9df636bcc9bf1344c468dd5.tar.xz | |
PM / devfreq: rockchip-dfi: Handle LPDDR2 correctly
According to the downstream driver the DDRMON_CTRL_LPDDR23 bit must be
set for both LPDDR2 and LPDDR3. Add the missing LPDDR2 case and while
at it turn the if/else if/else into switch/case which makes it easier
to read.
Link: https://lore.kernel.org/all/20231018061714.3553817-12-s.hauer@pengutronix.de/
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Diffstat (limited to 'drivers/devfreq/event')
| -rw-r--r-- | drivers/devfreq/event/rockchip-dfi.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c index 571d72d1abd1..8ce0191552ef 100644 --- a/drivers/devfreq/event/rockchip-dfi.c +++ b/drivers/devfreq/event/rockchip-dfi.c @@ -83,12 +83,19 @@ static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev) DDRMON_CTRL_HARDWARE_EN), dfi_regs + DDRMON_CTRL); /* set ddr type to dfi */ - if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR3) + switch (dfi->ddr_type) { + case ROCKCHIP_DDRTYPE_LPDDR2: + case ROCKCHIP_DDRTYPE_LPDDR3: writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR23, DDRMON_CTRL_DDR_TYPE_MASK), dfi_regs + DDRMON_CTRL); - else if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR4) + break; + case ROCKCHIP_DDRTYPE_LPDDR4: writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR4, DDRMON_CTRL_DDR_TYPE_MASK), dfi_regs + DDRMON_CTRL); + break; + default: + break; + } /* enable count, use software mode */ writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_SOFTWARE_EN, DDRMON_CTRL_SOFTWARE_EN), |