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author | Dave Jiang <dave.jiang@intel.com> | 2023-12-22 01:04:16 +0300 |
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committer | Dan Williams <dan.j.williams@intel.com> | 2023-12-23 02:46:02 +0300 |
commit | 42834b17cf1f00fa79ff1f02134f9c576a125252 (patch) | |
tree | d222e142779c41a6227886e0ace26d2e6733edb0 /drivers/cxl/core/cdat.c | |
parent | 86557b7edf77d2a3835136c325c8baa6fe803234 (diff) | |
download | linux-42834b17cf1f00fa79ff1f02134f9c576a125252.tar.xz |
cxl: Export sysfs attributes for memory device QoS class
Export qos_class sysfs attributes for the CXL memory device. The QoS clas
should show up as /sys/bus/cxl/devices/memX/ram/qos_class for the volatile
partition and /sys/bus/cxl/devices/memX/pmem/qos_class for the persistent
partition. The QTG ID is retrieved via _DSM after supplying the
calculated bandwidth and latency for the entire CXL path from device to
the CPU. This ID is used to match up to the root decoder QoS class to
determine which CFMWS the memory range of a hotplugged CXL mem device
should be assigned under.
While there may be multiple DSMAS exported by the device CDAT, the driver
will only expose the first QTG ID per partition in sysfs for now. In the
future when multiple QTG IDs are necessary, they can be exposed. [1]
[1]: https://lore.kernel.org/linux-cxl/167571650007.587790.10040913293130712882.stgit@djiang5-mobl3.local/T/#md2a47b1ead3e1ba08f50eab29a4af1aed1d215ab
Suggested-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/170319625698.2212653.17544381274847420961.stgit@djiang5-mobl3
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/cxl/core/cdat.c')
0 files changed, 0 insertions, 0 deletions