diff options
| author | Harsh Jain <harsh@chelsio.com> | 2017-10-08 11:07:22 +0300 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2017-11-03 16:50:45 +0300 |
| commit | 2956f36c954ee6e31068a02cf2ca551efa5235f1 (patch) | |
| tree | b9b3b62e820c1a74436135913e40a285730def54 /drivers/crypto/chelsio/chcr_algo.h | |
| parent | de1a00ac7da115ccafb4415364d484834638aa7f (diff) | |
| download | linux-2956f36c954ee6e31068a02cf2ca551efa5235f1.tar.xz | |
crypto: chelsio - Remove allocation of sg list to implement 2K limit of dsgl header
Update DMA address index instead of allocating new sg list to impose 2k size limit for each entry.
Signed-off-by: Harsh Jain <harsh@chelsio.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/chelsio/chcr_algo.h')
| -rw-r--r-- | drivers/crypto/chelsio/chcr_algo.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/crypto/chelsio/chcr_algo.h b/drivers/crypto/chelsio/chcr_algo.h index 54851ecaa6c1..d1a787b369c9 100644 --- a/drivers/crypto/chelsio/chcr_algo.h +++ b/drivers/crypto/chelsio/chcr_algo.h @@ -221,7 +221,7 @@ #define MAX_WR_SIZE 512 #define ROUND_16(bytes) ((bytes) & 0xFFFFFFF0) #define MAX_DSGL_ENT 32 -#define MAX_DIGEST_SKB_SGE (MAX_SKB_FRAGS - 2) +#define MAX_DIGEST_SKB_SGE (MAX_SKB_FRAGS - 1) #define MIN_CIPHER_SG 1 /* IV */ #define MIN_AUTH_SG 2 /*IV + AAD*/ #define MIN_GCM_SG 2 /* IV + AAD*/ @@ -261,7 +261,6 @@ struct cipher_wr_param { struct scatterlist *srcsg; char *iv; int bytes; - short int snent; unsigned short qid; }; enum { |