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| author | Tudor Ambarus <tudor-dan.ambarus@nxp.com> | 2016-09-30 12:09:39 +0300 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2016-10-02 17:33:45 +0300 |
| commit | f97581cfa6e7db9818520597b8a44f8268d75013 (patch) | |
| tree | 3142b5190712e36c9c3d143086de0a1151c6f27a /drivers/crypto/caam/sg_sw_sec4.h | |
| parent | 81422badb39078fde1ffcecda3caac555226fc7b (diff) | |
| download | linux-f97581cfa6e7db9818520597b8a44f8268d75013.tar.xz | |
crypto: caam - treat SGT address pointer as u64
Even for i.MX, CAAM is able to use address pointers greater than
32 bits, the address pointer field being interpreted as a double word.
Enforce u64 address pointer in the sec4_sg_entry struct.
This patch fixes the SGT address pointer endianness issue for
32bit platforms where core endianness != caam endianness.
Signed-off-by: Tudor Ambarus <tudor-dan.ambarus@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/caam/sg_sw_sec4.h')
| -rw-r--r-- | drivers/crypto/caam/sg_sw_sec4.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/crypto/caam/sg_sw_sec4.h b/drivers/crypto/caam/sg_sw_sec4.h index 19dc64fede0d..41cd5a356d05 100644 --- a/drivers/crypto/caam/sg_sw_sec4.h +++ b/drivers/crypto/caam/sg_sw_sec4.h @@ -15,7 +15,7 @@ struct sec4_sg_entry; static inline void dma_to_sec4_sg_one(struct sec4_sg_entry *sec4_sg_ptr, dma_addr_t dma, u32 len, u16 offset) { - sec4_sg_ptr->ptr = cpu_to_caam_dma(dma); + sec4_sg_ptr->ptr = cpu_to_caam_dma64(dma); sec4_sg_ptr->len = cpu_to_caam32(len); sec4_sg_ptr->bpid_offset = cpu_to_caam32(offset & SEC4_SG_OFFSET_MASK); #ifdef DEBUG |