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author | Thomas Gleixner <tglx@linutronix.de> | 2024-01-18 22:11:46 +0300 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2024-01-18 22:11:46 +0300 |
commit | 80fe58cc176fefceb7afd6dd937f97f37313b9b3 (patch) | |
tree | a6fd7b15e41640695b64ed4e94345747cb44dfc7 /drivers/clocksource/timer-ti-dm.c | |
parent | da65f29dada7f7cbbf0d6375b88a0316f5f7d6f5 (diff) | |
parent | c0c4579d79d0df841e825c68df450909a0032faf (diff) | |
download | linux-80fe58cc176fefceb7afd6dd937f97f37313b9b3.tar.xz |
Merge tag 'timers-v6.8-rc1' of http://git.linaro.org/people/daniel.lezcano/linux into timers/core
Pull clockevent/clocksource updates from Daniel Lezcano:
- Fixed error handling at probe time and uninitialized return code on
ep93xx (Arnd Bergman)
- Fixed some kerneldoc warning on Cadence TTC (Randy Dunlap)
- Fixed kerneldoc warning on Timer TI DM (Tony Lindgren)
- Handle interrupt disabling when shutting down the timer on RISC-V
timer (Joshua Yeong)
- Add compatible string for the StarFive JH8100 clint (Sia Jee Heng)
- Separate mtime and mtimecmp registers in DT bindings (Inochi Amaoto)
Link: https://lore.kernel.org/lkml/0f07af92-e4b2-48de-88a6-dd9aa9e49743@linaro.org
Diffstat (limited to 'drivers/clocksource/timer-ti-dm.c')
-rw-r--r-- | drivers/clocksource/timer-ti-dm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c index 5f60f6bd3386..56acf2617262 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c @@ -183,7 +183,7 @@ static inline u32 dmtimer_read(struct dmtimer *timer, u32 reg) * dmtimer_write - write timer registers in posted and non-posted mode * @timer: timer pointer over which write operation is to perform * @reg: lowest byte holds the register offset - * @value: data to write into the register + * @val: data to write into the register * * The posted mode bit is encoded in reg. Note that in posted mode, the write * pending bit must be checked. Otherwise a write on a register which has a @@ -949,7 +949,7 @@ static int omap_dm_timer_set_int_enable(struct omap_dm_timer *cookie, /** * omap_dm_timer_set_int_disable - disable timer interrupts - * @timer: pointer to timer handle + * @cookie: pointer to timer cookie * @mask: bit mask of interrupts to be disabled * * Disables the specified timer interrupts for a timer. |