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authorDinh Nguyen <dinguyen@kernel.org>2018-09-17 17:52:14 +0300
committerDaniel Lezcano <daniel.lezcano@linaro.org>2018-10-07 15:16:35 +0300
commit1f174a1a2cdebc65138e6ed1448b842e73200bb5 (patch)
tree0173a325eb2a804a228b77acffb4de46a6665700 /drivers/clocksource/dw_apb_timer_of.c
parent9414229c9c53d3604032aa80f3d2e9ba5770cd4a (diff)
downloadlinux-1f174a1a2cdebc65138e6ed1448b842e73200bb5.tar.xz
clocksource/drivers/dw_apb: Add reset control
Add code to retrieve the reset property from the dw-apb timers and if the property is available, the safe operation is to assert the timer into reset, and followed by a deassert of the timer reset (brings the timer out of reset). This patch is needed for systems where the bootloader has left the timer not used in reset. - Trivial conflict with commit a74bd1ad7a: "Convert to using %pOFn instead of device_node.name" Reported-by: Marek Vasut <marex@denx.de> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'drivers/clocksource/dw_apb_timer_of.c')
-rw-r--r--drivers/clocksource/dw_apb_timer_of.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/clocksource/dw_apb_timer_of.c b/drivers/clocksource/dw_apb_timer_of.c
index fabaa29cc3a4..db410acd8964 100644
--- a/drivers/clocksource/dw_apb_timer_of.c
+++ b/drivers/clocksource/dw_apb_timer_of.c
@@ -22,6 +22,7 @@
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/clk.h>
+#include <linux/reset.h>
#include <linux/sched_clock.h>
static void __init timer_get_base_and_rate(struct device_node *np,
@@ -29,6 +30,7 @@ static void __init timer_get_base_and_rate(struct device_node *np,
{
struct clk *timer_clk;
struct clk *pclk;
+ struct reset_control *rstc;
*base = of_iomap(np, 0);
@@ -36,6 +38,16 @@ static void __init timer_get_base_and_rate(struct device_node *np,
panic("Unable to map regs for %pOFn", np);
/*
+ * Reset the timer if the reset control is available, wiping
+ * out the state the firmware may have left it
+ */
+ rstc = of_reset_control_get(np, NULL);
+ if (!IS_ERR(rstc)) {
+ reset_control_assert(rstc);
+ reset_control_deassert(rstc);
+ }
+
+ /*
* Not all implementations use a periphal clock, so don't panic
* if it's not present
*/