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authorRex-BC Chen <rex-bc.chen@mediatek.com>2022-05-23 12:33:36 +0300
committerStephen Boyd <sboyd@kernel.org>2022-06-16 03:24:12 +0300
commit7d10ae3797e1aea48d7635685d3b9c3bdf2bc56e (patch)
treeffea768bf3d56d87ef7b3225de18c7b40af23632 /drivers/clk
parent322989ddf7c478a9cbbb51da0d4b51825a47735d (diff)
downloadlinux-7d10ae3797e1aea48d7635685d3b9c3bdf2bc56e.tar.xz
clk: mediatek: reset: Change return type for clock reset register function
To deal with error handling, we change the function return type from void to int for mtk_clk_register_rst_ctrl(). Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: NĂ­colas F. R. A. Prado <nfraprado@collabora.com> Tested-by: NĂ­colas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220523093346.28493-10-rex-bc.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/mediatek/reset.c15
-rw-r--r--drivers/clk/mediatek/reset.h6
2 files changed, 13 insertions, 8 deletions
diff --git a/drivers/clk/mediatek/reset.c b/drivers/clk/mediatek/reset.c
index 89e617ea6393..b9718f0f9d16 100644
--- a/drivers/clk/mediatek/reset.c
+++ b/drivers/clk/mediatek/reset.c
@@ -110,8 +110,8 @@ static int reset_xlate(struct reset_controller_dev *rcdev,
return data->desc->rst_idx_map[reset_spec->args[0]];
}
-void mtk_register_reset_controller(struct device_node *np,
- const struct mtk_clk_rst_desc *desc)
+int mtk_register_reset_controller(struct device_node *np,
+ const struct mtk_clk_rst_desc *desc)
{
struct regmap *regmap;
const struct reset_control_ops *rcops = NULL;
@@ -120,7 +120,7 @@ void mtk_register_reset_controller(struct device_node *np,
if (!desc) {
pr_err("mtk clock reset desc is NULL\n");
- return;
+ return -EINVAL;
}
switch (desc->version) {
@@ -132,18 +132,18 @@ void mtk_register_reset_controller(struct device_node *np,
break;
default:
pr_err("Unknown reset version %d\n", desc->version);
- return;
+ return -EINVAL;
}
regmap = device_node_to_regmap(np);
if (IS_ERR(regmap)) {
pr_err("Cannot find regmap for %pOF: %pe\n", np, regmap);
- return;
+ return -EINVAL;
}
data = kzalloc(sizeof(*data), GFP_KERNEL);
if (!data)
- return;
+ return -ENOMEM;
data->desc = desc;
data->regmap = regmap;
@@ -163,7 +163,10 @@ void mtk_register_reset_controller(struct device_node *np,
if (ret) {
pr_err("could not register reset controller: %d\n", ret);
kfree(data);
+ return ret;
}
+
+ return 0;
}
MODULE_LICENSE("GPL");
diff --git a/drivers/clk/mediatek/reset.h b/drivers/clk/mediatek/reset.h
index cc847c67a2fc..260f25f27656 100644
--- a/drivers/clk/mediatek/reset.h
+++ b/drivers/clk/mediatek/reset.h
@@ -56,8 +56,10 @@ struct mtk_clk_rst_data {
* mtk_register_reset_controller - Register MediaTek clock reset controller
* @np: Pointer to device node.
* @desc: Constant pointer to description of clock reset.
+ *
+ * Return: 0 on success and errorno otherwise.
*/
-void mtk_register_reset_controller(struct device_node *np,
- const struct mtk_clk_rst_desc *desc);
+int mtk_register_reset_controller(struct device_node *np,
+ const struct mtk_clk_rst_desc *desc);
#endif /* __DRV_CLK_MTK_RESET_H */