Merge branches 'clk-cleanup', 'clk-mediatek', 'clk-kunit', 'clk-xilinx' and 'clk-fixed-gate' into clk-next

 - Various clk driver cleanups
 - MediaTek MT6735 SoC clks
 - MediaTek MT7620, MT7628 and MT7688 MMC clks
 - KUnit tests for clk-assigned-rates{,-u64}
 - Add a driver for gated fixed rate clocks

* clk-cleanup:
  clk: clk-loongson2: Fix potential buffer overflow in flexible-array member access
  clk: Fix invalid execution of clk_set_rate
  clk: clk-loongson2: Fix memory corruption bug in struct loongson2_clk_provider
  clk: lan966x: make it selectable for ARCH_LAN969X
  clk: clk-apple-nco: Add NULL check in applnco_probe
  clk: starfive: jh7110-pll: Mark the probe function as __init
  clk: sophgo: avoid integer overflow in sg2042_pll_recalc_rate()
  clk: tegra: use clamp() in tegra_bpmp_clk_determine_rate()
  clk: cdce925: make regmap_cdce925_bus constant
  clk: Drop explicit initialization of struct i2c_device_id::driver_data to 0
  clk: clk-qoriq: Replace of_node_put() with __free()
  clk: Remove unused clk_hw_rate_is_protected

* clk-mediatek:
  clk: en7523: map io region in a single block
  clk: en7523: move en7581_reset_register() in en7581_clk_hw_init()
  clk: en7523: fix estimation of fixed rate for EN7581
  clk: en7523: introduce chip_scu regmap
  clk: en7523: move clock_register in hw_init callback
  clk: en7523: remove REG_PCIE*_{MEM,MEM_MASK} configuration
  dt-bindings: clock: airoha: Update reg mapping for EN7581 SoC.
  clk: mediatek: Add drivers for MT6735 syscon clock and reset controllers
  dt-bindings: clock: mediatek: Add bindings for MT6735 syscon clock and reset controllers
  clk: mediatek: mt6735-apmixedsys: Fix an error handling path in clk_mt6735_apmixed_probe()
  clk: ralink: mtmips: add mmc related clocks for SoCs MT7620, MT7628 and MT7688
  clk: ralink: mtmips: fix clocks probe order in oldest ralink SoCs
  clk: ralink: mtmips: fix clock plan for Ralink SoC RT3883
  clk: mediatek: clk-mt8188-topckgen: Remove univpll from parents of mfg_core_tmp
  clk: mediatek: Add drivers for MediaTek MT6735 main clock and reset drivers
  dt-bindings: clock: Add MediaTek MT6735 clock and reset bindings
  clk: mediatek: drop two dead config options

* clk-kunit:
  clk: Allow kunit tests to run without OF_OVERLAY enabled
  clk: test: Add KUnit tests for clock-assigned-rates{-u64} DT properties
  of: kunit: Extract some overlay boiler plate into macros
  clk: test: Add test managed of_clk_add_hw_provider()

* clk-xilinx:
  clk: clocking-wizard: move dynamic reconfig setup behind flag
  dt-bindings: clock: xilinx: describe whether dynamic reconfig is enabled
  clk: clocking-wizard: move clock registration to separate function
  clk: clocking-wizard: use devres versions of clk_hw API
  clk: clocking-wizard: use newer clk_hw API
  clk: clocking-wizard: simplify probe/remove with devres helpers

* clk-fixed-gate:
  clk: clk-gpio: add driver for gated-fixed-clocks
  clk: clk-gpio: use dev_err_probe for gpio-get failure
  clk: clk-gpio: update documentation for gpio-gate clock
  dt-bindings: clocks: add binding for gated-fixed-clocks