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| author | Rajan Vaja <rajan.vaja@xilinx.com> | 2019-12-05 09:35:54 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-01-24 00:21:50 +0300 |
| commit | 352546805a44871b68affea09a2fbd5a48e452d0 (patch) | |
| tree | d70f29f0e6aa2c4ef1491d611eae0ad3ba91c528 /drivers/clk/zynqmp | |
| parent | e42617b825f8073569da76dc4510bfa019b1c35a (diff) | |
| download | linux-352546805a44871b68affea09a2fbd5a48e452d0.tar.xz | |
dt-bindings: clock: Add bindings for versal clock driver
Add documentation to describe Xilinx Versal clock driver
bindings.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/1575527759-26452-2-git-send-email-rajan.vaja@xilinx.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/zynqmp')
0 files changed, 0 insertions, 0 deletions