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authorDong Aisheng <aisheng.dong@nxp.com>2021-04-23 06:33:33 +0300
committerAbel Vesa <abel.vesa@nxp.com>2021-06-14 12:33:19 +0300
commit5964012ce37e66d2588a9bc82f7184a008851cac (patch)
tree890c37c2e502c4d6209764f3476c91361dfd8e27 /drivers/clk/imx/clk-imx8qxp.c
parent5392c5de096a1cad7cc06265a8cbf18de2da22c7 (diff)
downloadlinux-5964012ce37e66d2588a9bc82f7184a008851cac.tar.xz
clk: imx8qxp: add clock valid checking mechnism
clk-imx8qxp is a common SCU clock driver used by both QM and QXP platforms. The clock numbers vary a bit between those two platforms. This patch introduces a mechanism to only register the valid clocks for one platform by checking the clk resource id table. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Diffstat (limited to 'drivers/clk/imx/clk-imx8qxp.c')
-rw-r--r--drivers/clk/imx/clk-imx8qxp.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c
index d17b418ac577..9e35ae45b3a0 100644
--- a/drivers/clk/imx/clk-imx8qxp.c
+++ b/drivers/clk/imx/clk-imx8qxp.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright 2018 NXP
+ * Copyright 2018-2021 NXP
* Dong Aisheng <aisheng.dong@nxp.com>
*/
@@ -9,6 +9,7 @@
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
@@ -27,9 +28,11 @@ static const char *dc0_sels[] = {
static int imx8qxp_clk_probe(struct platform_device *pdev)
{
struct device_node *ccm_node = pdev->dev.of_node;
+ const struct imx_clk_scu_rsrc_table *rsrc_table;
int ret;
- ret = imx_clk_scu_init(ccm_node);
+ rsrc_table = of_device_get_match_data(&pdev->dev);
+ ret = imx_clk_scu_init(ccm_node, rsrc_table);
if (ret)
return ret;
@@ -130,7 +133,7 @@ static int imx8qxp_clk_probe(struct platform_device *pdev)
static const struct of_device_id imx8qxp_match[] = {
{ .compatible = "fsl,scu-clk", },
- { .compatible = "fsl,imx8qxp-clk", },
+ { .compatible = "fsl,imx8qxp-clk", &imx_clk_scu_rsrc_imx8qxp, },
{ /* sentinel */ }
};