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authorA.s. Dong <aisheng.dong@nxp.com>2018-11-14 16:01:47 +0300
committerStephen Boyd <sboyd@kernel.org>2018-12-03 22:31:32 +0300
commit9fcb6be3b6c994f275761b22800e4244f610bdc5 (patch)
treec2519ef24df87c69edffa201947c55dcd3b6a098 /drivers/clk/imx/Makefile
parentd9a8f950b296729b88d7139904cac5fd6d0a5261 (diff)
downloadlinux-9fcb6be3b6c994f275761b22800e4244f610bdc5.tar.xz
clk: imx: add pfdv2 support
The pfdv2 is designed for PLL Fractional Divide (PFD) observed in System Clock Generation (SCG) module in IMX ULP SoC series. e.g. i.MX7ULP. NOTE pfdv2 can only be operated when clk is gated. Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Anson Huang <Anson.Huang@nxp.com> Cc: Bai Ping <ping.bai@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> [sboyd@kernel.org: Include clk.h for sparse warnings] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/imx/Makefile')
-rw-r--r--drivers/clk/imx/Makefile3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
index 4cac28b21d05..e7248de5ffe1 100644
--- a/drivers/clk/imx/Makefile
+++ b/drivers/clk/imx/Makefile
@@ -13,7 +13,8 @@ obj-y += \
clk-pllv2.o \
clk-pllv3.o \
clk-pllv4.o \
- clk-pfd.o
+ clk-pfd.o \
+ clk-pfdv2.o
obj-$(CONFIG_SOC_IMX1) += clk-imx1.o
obj-$(CONFIG_SOC_IMX21) += clk-imx21.o