diff options
| author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2020-11-19 18:43:16 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-12-19 22:50:56 +0300 |
| commit | 7a110b9107ed8fe27277988cdb4d18e7043b7252 (patch) | |
| tree | 8e4d7d7bc4f460dd7e8510d08dccd567d849cd6f /drivers/clk/at91/dt-compat.c | |
| parent | 120d5d8b4614ee26c576b29377a968093948473f (diff) | |
| download | linux-7a110b9107ed8fe27277988cdb4d18e7043b7252.tar.xz | |
clk: at91: clk-master: re-factor master clock
Re-factor master clock driver by splitting it into 2 clocks: prescaller
and divider clocks. Based on registered clock flags the prescaler's rate
could be changed at runtime. This is necessary for platforms supporting
DVFS (e.g. SAMA7G5) where master clock could be changed at run-time.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-11-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/at91/dt-compat.c')
| -rw-r--r-- | drivers/clk/at91/dt-compat.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c index a50084de97d4..a97b99c2dc12 100644 --- a/drivers/clk/at91/dt-compat.c +++ b/drivers/clk/at91/dt-compat.c @@ -24,6 +24,8 @@ #define GCK_INDEX_DT_AUDIO_PLL 5 +static DEFINE_SPINLOCK(mck_lock); + #ifdef CONFIG_HAVE_AT91_AUDIO_PLL static void __init of_sama5d2_clk_audio_pll_frac_setup(struct device_node *np) { @@ -388,9 +390,16 @@ of_at91_clk_master_setup(struct device_node *np, if (IS_ERR(regmap)) return; - hw = at91_clk_register_master(regmap, name, num_parents, - parent_names, layout, - characteristics); + hw = at91_clk_register_master_pres(regmap, "masterck_pres", num_parents, + parent_names, layout, + characteristics, &mck_lock, + CLK_SET_RATE_GATE, INT_MIN); + if (IS_ERR(hw)) + goto out_free_characteristics; + + hw = at91_clk_register_master_div(regmap, name, "masterck_pres", + layout, characteristics, + &mck_lock, CLK_SET_RATE_GATE); if (IS_ERR(hw)) goto out_free_characteristics; |