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authorMauro Carvalho Chehab <mchehab@osg.samsung.com>2015-04-27 16:32:45 +0300
committerMauro Carvalho Chehab <mchehab@osg.samsung.com>2015-04-27 16:32:45 +0300
commitb3e5ced63e051e8f911b795ac5b06229a5328f7b (patch)
treee63badb76509839ec948431859255923b6e2a09c /drivers/ata/ahci.c
parente183201b9e917daf2530b637b2f34f1d5afb934d (diff)
parentb787f68c36d49bb1d9236f403813641efa74a031 (diff)
downloadlinux-b3e5ced63e051e8f911b795ac5b06229a5328f7b.tar.xz
Merge tag 'v4.1-rc1' into patchwork
Linux 4.1-rc1 * tag 'v4.1-rc1': (11651 commits) Linux 4.1-rc1 x86_64, asm: Work around AMD SYSRET SS descriptor attribute issue v4l: xilinx: fix for include file movement platform/chrome: chromeos_laptop - instantiate Atmel at primary address RCU pathwalk breakage when running into a symlink overmounting something fix I_DIO_WAKEUP definition direct-io: only inc/dec inode->i_dio_count for file systems fs/9p: fix readdir() Btrfs: prevent list corruption during free space cache processing toshiba_acpi: Do not register vendor backlight when acpi_video bl is available x86: fix special __probe_kernel_write() tail zeroing case crypto: img-hash - CRYPTO_DEV_IMGTEC_HASH should depend on HAS_DMA crypto: x86/sha512_ssse3 - fixup for asm function prototype change nios2: rework cache nios2: Add types.h header required for __u32 type ALSA: hda - fix headset mic detection problem for one more machine eth: bf609 eth clock: add pclk clock for stmmac driver probe blackfin: Wire up missing syscalls Btrfs: fix inode cache writeout ACPI / scan: Add a scan handler for PRP0001 ...
Diffstat (limited to 'drivers/ata/ahci.c')
-rw-r--r--drivers/ata/ahci.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 33bb06e006c9..c7a92a743ed0 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -738,10 +738,10 @@ static int ahci_configure_dma_masks(struct pci_dev *pdev, int using_dac)
return 0;
if (using_dac &&
- !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
+ !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
if (rc) {
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev,
"64-bit DMA enable failed\n");
@@ -749,12 +749,12 @@ static int ahci_configure_dma_masks(struct pci_dev *pdev, int using_dac)
}
}
} else {
- rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev, "32-bit DMA enable failed\n");
return rc;
}
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev,
"32-bit consistent DMA enable failed\n");