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authorThierry Reding <treding@nvidia.com>2021-12-07 15:59:59 +0300
committerThierry Reding <treding@nvidia.com>2021-12-15 19:29:53 +0300
commitc98167bbe865591351df10fd88f759f41006d060 (patch)
tree610da5d5fdc8cfbb0beafb9d4e09151264ba1c03 /arch
parente1808b09df868135240b6b489b692e105d0b17a7 (diff)
downloadlinux-c98167bbe865591351df10fd88f759f41006d060.tar.xz
ARM: tegra: Add dummy backlight power supplies
The Medcom Wide and PAZ00 boards don't specify the power supply for the backlight, which means that the Linux driver will provide a dummy one. Wire up an explicit dummy to also make the DT schema validation succeed. Unfortunately I don't have access to the schematics for the Medcom Wide, so I don't know if a more accurate description is possible. The AC100 (PAZ00) schematics from here: https://www.s-manuals.com/pdf/motherboard/compal/compal_la-6352p_r1.0a_schematics.pdf aren't entirely clear which one of the supplies powers backlight, but the panel supply is probably close enough. Based on work by David Heidelberg <david@ixit.cz>. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/tegra20-medcom-wide.dts3
-rw-r--r--arch/arm/boot/dts/tegra20-paz00.dts3
2 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20-medcom-wide.dts b/arch/arm/boot/dts/tegra20-medcom-wide.dts
index cb6199d7d224..f144487c5da3 100644
--- a/arch/arm/boot/dts/tegra20-medcom-wide.dts
+++ b/arch/arm/boot/dts/tegra20-medcom-wide.dts
@@ -54,6 +54,9 @@
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
+
+ /* close enough */
+ power-supply = <&vdd_3v3_reg>;
};
panel: panel {
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index 12c245869a74..5ce6a1ff93de 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -571,6 +571,9 @@
brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
default-brightness-level = <10>;
+
+ /* close enough */
+ power-supply = <&vdd_pnl_reg>;
};
clk32k_in: clock-32k {