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authorSean Anderson <sean.anderson@seco.com>2022-01-27 23:06:36 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2022-02-08 19:28:12 +0300
commit5726079cd4860c190722445e01e1007e40a9ccb4 (patch)
tree4fb4459f92a139a3d65c733e8daeb4d7f690bbda /arch
parentd8b1c3d0d700f7995607fde333a992de28636178 (diff)
downloadlinux-5726079cd4860c190722445e01e1007e40a9ccb4.tar.xz
arm64: dts: ipq6018: Use reference clock to set dwc3 period
Instead of manually setting snps,ref-clock-period-ns, we can let the driver calculate it automatically from the "ref" clock. I haven't reviewed this board's schematics, so please let me know if this is the wrong 24MHz clock to use. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Link: https://lore.kernel.org/r/20220127200636.1456175-8-sean.anderson@seco.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/qcom/ipq6018.dtsi3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 66ec5615651d..a614b9f73e2c 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -743,12 +743,13 @@
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
phys = <&qusb_phy_0>, <&usb0_ssphy>;
phy-names = "usb2-phy", "usb3-phy";
+ clocks = <&xo>;
+ clock-names = "ref";
tx-fifo-resize;
snps,is-utmi-l1-suspend;
snps,hird-threshold = /bits/ 8 <0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
- snps,ref-clock-period-ns = <0x32>;
dr_mode = "host";
};
};