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author | Alex Elder <elder@linaro.org> | 2014-07-01 02:15:40 +0400 |
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committer | Matt Porter <mporter@linaro.org> | 2014-07-28 17:41:54 +0400 |
commit | 1d3138b75e3af493261c7a1e085b66b34c74dfbb (patch) | |
tree | 0bafc78fca1aa4e470d3b6899465c9bed4efd135 /arch | |
parent | a62451c3f91af33e47a17f17ae65de76774b2854 (diff) | |
download | linux-1d3138b75e3af493261c7a1e085b66b34c74dfbb.tar.xz |
ARM: dts: enable SMP support for bcm21664
Define nodes representing the two Cortex A9 CPUs in a bcm21644 SoC.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/bcm21664.dtsi | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm21664.dtsi b/arch/arm/boot/dts/bcm21664.dtsi index 8b366822bb43..2016b72a8fb7 100644 --- a/arch/arm/boot/dts/bcm21664.dtsi +++ b/arch/arm/boot/dts/bcm21664.dtsi @@ -27,6 +27,25 @@ bootargs = "console=ttyS0,115200n8"; }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + enable-method = "brcm,bcm11351-cpu-method"; + secondary-boot-reg = <0x35004178>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <1>; + }; + }; + gic: interrupt-controller@3ff00100 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; |