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| author | Robert Richter <robert.richter@amd.com> | 2009-06-10 23:47:10 +0400 |
|---|---|---|
| committer | Robert Richter <robert.richter@amd.com> | 2009-06-10 23:47:10 +0400 |
| commit | 0886751c5d8b19fcee2e65d34ae21c9111e652a9 (patch) | |
| tree | 015e8c2b3d44d46e9e8fccd016340c51bc876d3b /arch/x86/mm/pageattr.c | |
| parent | 7e4e0bd50e80df2fe5501f48f872448376cdd997 (diff) | |
| parent | 07a2039b8eb0af4ff464efd3dfd95de5c02648c6 (diff) | |
| download | linux-0886751c5d8b19fcee2e65d34ae21c9111e652a9.tar.xz | |
Merge commit 'v2.6.30' into oprofile/master
Diffstat (limited to 'arch/x86/mm/pageattr.c')
| -rw-r--r-- | arch/x86/mm/pageattr.c | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index 797f9f107cb6..e17efed088c5 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c @@ -153,7 +153,7 @@ static void __cpa_flush_all(void *arg) */ __flush_tlb_all(); - if (cache && boot_cpu_data.x86_model >= 4) + if (cache && boot_cpu_data.x86 >= 4) wbinvd(); } @@ -208,20 +208,15 @@ static void cpa_flush_array(unsigned long *start, int numpages, int cache, int in_flags, struct page **pages) { unsigned int i, level; + unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */ BUG_ON(irqs_disabled()); - on_each_cpu(__cpa_flush_range, NULL, 1); + on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1); - if (!cache) + if (!cache || do_wbinvd) return; - /* 4M threshold */ - if (numpages >= 1024) { - if (boot_cpu_data.x86_model >= 4) - wbinvd(); - return; - } /* * We only need to flush on one CPU, * clflush is a MESI-coherent instruction that |