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| author | Al Viro <viro@zeniv.linux.org.uk> | 2008-08-18 05:05:42 +0400 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2008-10-23 09:55:20 +0400 |
| commit | bb8985586b7a906e116db835c64773b7a7d51663 (patch) | |
| tree | de93ae58e88cc563d95cc124a73f3930594c6100 /arch/x86/include/asm/pci_64.h | |
| parent | 8ede0bdb63305d3353efd97e9af6210afb05734e (diff) | |
| download | linux-bb8985586b7a906e116db835c64773b7a7d51663.tar.xz | |
x86, um: ... and asm-x86 move
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/include/asm/pci_64.h')
| -rw-r--r-- | arch/x86/include/asm/pci_64.h | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/arch/x86/include/asm/pci_64.h b/arch/x86/include/asm/pci_64.h new file mode 100644 index 000000000000..f72e12d5770e --- /dev/null +++ b/arch/x86/include/asm/pci_64.h @@ -0,0 +1,66 @@ +#ifndef ASM_X86__PCI_64_H +#define ASM_X86__PCI_64_H + +#ifdef __KERNEL__ + +#ifdef CONFIG_CALGARY_IOMMU +static inline void *pci_iommu(struct pci_bus *bus) +{ + struct pci_sysdata *sd = bus->sysdata; + return sd->iommu; +} + +static inline void set_pci_iommu(struct pci_bus *bus, void *val) +{ + struct pci_sysdata *sd = bus->sysdata; + sd->iommu = val; +} +#endif /* CONFIG_CALGARY_IOMMU */ + +extern int (*pci_config_read)(int seg, int bus, int dev, int fn, + int reg, int len, u32 *value); +extern int (*pci_config_write)(int seg, int bus, int dev, int fn, + int reg, int len, u32 value); + +extern void dma32_reserve_bootmem(void); +extern void pci_iommu_alloc(void); + +/* The PCI address space does equal the physical memory + * address space. The networking and block device layers use + * this boolean for bounce buffer decisions + * + * On AMD64 it mostly equals, but we set it to zero if a hardware + * IOMMU (gart) of sotware IOMMU (swiotlb) is available. + */ +#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys) + +#if defined(CONFIG_GART_IOMMU) || defined(CONFIG_CALGARY_IOMMU) + +#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ + dma_addr_t ADDR_NAME; +#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ + __u32 LEN_NAME; +#define pci_unmap_addr(PTR, ADDR_NAME) \ + ((PTR)->ADDR_NAME) +#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ + (((PTR)->ADDR_NAME) = (VAL)) +#define pci_unmap_len(PTR, LEN_NAME) \ + ((PTR)->LEN_NAME) +#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ + (((PTR)->LEN_NAME) = (VAL)) + +#else +/* No IOMMU */ + +#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) +#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) +#define pci_unmap_addr(PTR, ADDR_NAME) (0) +#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) +#define pci_unmap_len(PTR, LEN_NAME) (0) +#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) + +#endif + +#endif /* __KERNEL__ */ + +#endif /* ASM_X86__PCI_64_H */ |