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author | Paolo Bonzini <pbonzini@redhat.com> | 2023-10-31 17:15:15 +0300 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2023-10-31 17:15:15 +0300 |
commit | f292dc8aad10f8e3be2cfaa4714b92464f42c710 (patch) | |
tree | c7c9f80d655fdbc53cd697ce13cf9e0157e2ee17 /arch/x86/include/asm/msr-index.h | |
parent | fadaf574a7fabe27016f734bd02a3bd27d0fcc10 (diff) | |
parent | 2770d4722036d6bd24bcb78e9cd7f6e572077d03 (diff) | |
download | linux-f292dc8aad10f8e3be2cfaa4714b92464f42c710.tar.xz |
Merge tag 'kvm-x86-misc-6.7' of https://github.com/kvm-x86/linux into HEAD
KVM x86 misc changes for 6.7:
- Add CONFIG_KVM_MAX_NR_VCPUS to allow supporting up to 4096 vCPUs without
forcing more common use cases to eat the extra memory overhead.
- Add IBPB and SBPB virtualization support.
- Fix a bug where restoring a vCPU snapshot that was taken within 1 second of
creating the original vCPU would cause KVM to try to synchronize the vCPU's
TSC and thus clobber the correct TSC being set by userspace.
- Compute guest wall clock using a single TSC read to avoid generating an
inaccurate time, e.g. if the vCPU is preempted between multiple TSC reads.
- "Virtualize" HWCR.TscFreqSel to make Linux guests happy, which complain
about a "Firmware Bug" if the bit isn't set for select F/M/S combos.
- Don't apply side effects to Hyper-V's synthetic timer on writes from
userspace to fix an issue where the auto-enable behavior can trigger
spurious interrupts, i.e. do auto-enabling only for guest writes.
- Remove an unnecessary kick of all vCPUs when synchronizing the dirty log
without PML enabled.
- Advertise "support" for non-serializing FS/GS base MSR writes as appropriate.
- Use octal notation for file permissions through KVM x86.
- Fix a handful of typo fixes and warts.
Diffstat (limited to 'arch/x86/include/asm/msr-index.h')
-rw-r--r-- | arch/x86/include/asm/msr-index.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index b37abb55e948..389f9594746e 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -553,6 +553,7 @@ #define MSR_AMD64_CPUID_FN_1 0xc0011004 #define MSR_AMD64_LS_CFG 0xc0011020 #define MSR_AMD64_DC_CFG 0xc0011022 +#define MSR_AMD64_TW_CFG 0xc0011023 #define MSR_AMD64_DE_CFG 0xc0011029 #define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT 1 |