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author | Peter Zijlstra (Intel) <peterz@infradead.org> | 2022-04-11 13:19:35 +0300 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2022-06-08 11:47:52 +0300 |
commit | 0d23dc34a7cefde5ee25c321949579694edbd16d (patch) | |
tree | c0acd31e754300bcc0a7813a45c497ac1b096e68 /arch/x86/events/perf_event.h | |
parent | 2c985527dd8d283e786ad7a67e532ef7f6f00fac (diff) | |
download | linux-0d23dc34a7cefde5ee25c321949579694edbd16d.tar.xz |
x86/perf/core: Add pebs_capable to store valid PEBS_COUNTER_MASK value
The value of pebs_counter_mask will be accessed frequently
for repeated use in the intel_guest_get_msrs(). So it can be
optimized instead of endlessly mucking about with branches.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Message-Id: <20220411101946.20262-7-likexu@tencent.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/events/perf_event.h')
-rw-r--r-- | arch/x86/events/perf_event.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h index 07fdef4f9ad2..09c68265b577 100644 --- a/arch/x86/events/perf_event.h +++ b/arch/x86/events/perf_event.h @@ -828,6 +828,7 @@ struct x86_pmu { void (*pebs_aliases)(struct perf_event *event); unsigned long large_pebs_flags; u64 rtm_abort_event; + u64 pebs_capable; /* * Intel LBR |