diff options
| author | Conor Dooley <conor.dooley@microchip.com> | 2022-06-03 11:38:26 +0300 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2022-06-12 21:33:52 +0300 |
| commit | 5e757deddd918edb8cb2fdb56eb79656ffc6dade (patch) | |
| tree | 809b8384dc76c01c438c038c9b90a201732e5baf /arch/riscv | |
| parent | f2906aa863381afb0015a9eb7fefad885d4e5a56 (diff) | |
| download | linux-5e757deddd918edb8cb2fdb56eb79656ffc6dade.tar.xz | |
riscv: dts: microchip: re-add pdma to mpfs device tree
PolarFire SoC /does/ have a SiFive pdma, despite what I suggested as a
conflict resolution to Zong. Somehow the entry fell through the cracks
between versions of my dt patches, so re-add it with Zong's updated
compatible & dma-channels property.
Fixes: c5094f371008 ("riscv: dts: microchip: refactor icicle kit device tree")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'arch/riscv')
| -rw-r--r-- | arch/riscv/boot/dts/microchip/mpfs.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi index 8c3259134194..3095d08453a1 100644 --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi @@ -192,6 +192,15 @@ riscv,ndev = <186>; }; + pdma: dma-controller@3000000 { + compatible = "sifive,fu540-c000-pdma", "sifive,pdma0"; + reg = <0x0 0x3000000 0x0 0x8000>; + interrupt-parent = <&plic>; + interrupts = <5 6>, <7 8>, <9 10>, <11 12>; + dma-channels = <4>; + #dma-cells = <1>; + }; + clkcfg: clkcfg@20002000 { compatible = "microchip,mpfs-clkcfg"; reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>; |